Difference: MassStorage (13 vs. 14)

Revision 142019-02-05 - PeterSchmid

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Read Byte
Changed:
<
<		 ; MSB first

LDI 0 PLO R5 LDI 0xFF PHI R6 LDI 0xFF - 8 PLO R6 SEX R6 BITLOOP: OUT2 ; CLK for SPI, INC Rx GHI R6 ; set CARRY SHRC

>
>		 GHI R0 ; D = 0 PLO R5 ; reset all bits LDI 0 - 8 ; counting up 8 times PLO R6 ; bit counter RDBITLOOP GLO R4 ; set CARRY SHR
  GLO R5
Changed:
<
<		 B2 SETBIT ; branch if bit set
>
>		 BN2 SETBIT ; branch if bit set (EF2 == 0)
  SHL ; bit not set BR SAVEBIT
Changed:
<
<		SETBIT: SHLC SAVEBIT:
>
>		SETBIT SHLC SAVEBIT OUT P2 ; CLK for SPI, INC Rx
  PLO R5 GLO R6
Changed:
<
<		 BNZ BITLOOP
>
>		 BNZ RDBITLOOP
 

about 200 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s

Line: 198 to 190
 

Write Byte
Changed:
<
<		WRITEBYTE: LDI 0 PHI R6 LDI 8
>
>		WRITEBYTE PLO R5 ; save transmit byte LDI 8 ; counter 8 bits
  PLO R6
Changed:
<
<		 SEX R0 BITLOOP: GLO R5 ; get the next bit SHLC , next bit is in the carry
>
>		WRBITLOOP GLO R5 ; get the next bit SHL ; next bit is in the carry
  PLO R5
Changed:
<
<		 LSNF OUT2,0b00000000 ; CLK for SPI with data bit cleared LSDF OUT2,0b00000001 ; CLK for SPI with data bit set
>
>		 LSNF ; skip if bit is 0 OUT P2 BYTE 00000001B ; CLK for SPI with data bit cleared LSDF ; skip if bit is 1 OUT P2 BYTE 00000000B ; CLK for SPI with data bit set
  DEC R6 GLO R6
Changed:
<
<		 BNZ BITLOOP
>
>		 BNZ WRBITLOOP
 

Line: 311 to 301
 
Mini Boot Loader

Mini Boot Loader
Changed:
<
<		 ; MSB first

LDI xyz ; EEPROM read command PLO R9 LDI 0 PLO R7 ; set page pointer PHI R8 ; set EEPROM address PLO R8 LDI 0x80 PHI R7 ; set block pointer BLOCKLOOP:

GLO R9 ; write read command to the EEPROM PLO R5 CALL WRITEBYTE LDI 0 ; address bit 17 to 24 PLO R5 CALL WRITEBYTE GHI R8 ; address bit 8 to 16 PLO R5 CALL WRITEBYTE GLO R8 ; address bit 8 to 16 PLO R5

PAGELOOP: LDI 0 ; init read byte PLO R5 LDI 0xFF ; for the carry bits PHI R6 LDI 0xFF - 8 ; counting up 8 times PLO R6 ; bit counter SEX R6 ; dummy Rx for OUT RDBITLOOP: OUT2 ; CLK for SPI, INC Rx GHI R6 ; set CARRY SHRC GLO R5 B2 SETBIT ; branch if bit set SHL ; bit not set BR SAVEBIT SETBIT: SHLC SAVEBIT: PLO R5 GLO R6 BNZ BITLOOP GLO R5 ; get byte

>
>		 ; TITL "EEPROM Boot Loader for Elf Memebership Card" ; EJCT 60
 
Added:
>
>		 CPU 1802
 
Changed:
<
<		WRITEBYTE: LDI 0 PHI R6 LDI 8 PLO R6 SEX R0 WRBITLOOP: GLO R5 ; get the next bit SHLC , next bit is in the carry PLO R5 LSNF OUT2,0b00000000 ; CLK for SPI with data bit cleared LSDF OUT2,0b00000001 ; CLK for SPI with data bit set DEC R6 GLO R6 BNZ BITLOOP
>
>		 NUMBER EQU 0
 
Added:
>
>		 ; ; Register Definitions: ; R0 EQU 0 R1 EQU 1 R2 EQU 2 R3 EQU 3 R4 EQU 4 R5 EQU 5 R6 EQU 6 R7 EQU 7 R8 EQU 8 R9 EQU 9 R10 EQU 10 R11 EQU 11 R12 EQU 12 R13 EQU 13 R14 EQU 14 R15 EQU 15

; ; I/O Port Definitions: ; P1 EQU 1 P2 EQU 2 P3 EQU 3 P4 EQU 4 P5 EQU 5 P6 EQU 6 P7 EQU 7

ORG 0H

; R0 program counter ; R1 subroutine pc ; R2 stack pointer ; R5.0 byte (read/write) ; R6.0 bit counter ; R4.0 carry bits ; R7 destination address ; R8 length

BOOTLOADER

  1. f8:11111000 LDI 080H ; set destination address
  2. 80:10000000
  3. b7:10110111 PHI R7
  4. f8:11111000 LDI 080H ; set length
  5. 80:10000000
  6. b8:10111000 PHI R8
  7. 90:10010000 GHI R0 ; D = 00H
  8. a7:10100111 PLO R7 ; destination address begins at page
  9. a8:10101000 PLO R8 ; lenght in pages
  10. b1:10110001 PHI R1 ; high byte subroutine
  11. a a2:10100010 PLO R2 ; stack pointer = 0100H
  12. b f8:11111000 LDI 01H
  13. c 01:00000001
  14. d b2:10110010 PHI R2
  15. e f8:11111000 LDI LOW WRITEBYTE ; low byte subroutine
  16. f 48:01001000
  17. a1:10100001 PLO R1
  18. f8:11111000 LDI 01H ; for the carry
  19. 01:00000001
  20. a4:10100100 PLO R4
  21. 61:01100001 OUT P1 ; deactivate CS to start operation
  22. 00:00000000 BYTE 00H

  1. e1:11100001 SEX R1 ; for immediate OUT in subroutine
  2. f8:11111000 LDI 03H ; EEPROM read command
  3. 03:00000011
  4. d1:11010001 SEP R1 ; CALL WRITEBYTE
  5. a 90:10010000 GHI R0 ; address bit 16 to 23 = 0
  6. b d1:11010001 SEP R1 ; CALL WRITEBYTE, replace by NOP for ; 8 to 512 Kibit EEPROMs
  7. c 90:10010000 GHI R0 ; address bit 8 to 15 = 0
  8. d d1:11010001 SEP R1 ; CALL WRITEBYTE, replace by NOP for ; 1 to 4 Kibit EEPROMs
  9. e 90:10010000 GHI R0 ; address bit 0 to 7 = 0
  10. f d1:11010001 SEP R1 ; CALL WRITEBYTE

  1. e6:11100110 SEX R6 ; Rx for OUT
  2. 90:10010000 BLOCKLOOP GHI R0 ; D = 0
  3. a5:10100101 PLO R5 ; reset all bits
  4. f8:11111000 LDI 0 - 8 ; counting up 8 times
  5. f8:11111000
  6. a6:10100110 PLO R6 ; bit counter
  7. 84:10000100 RDBITLOOP GLO R4 ; set CARRY
  8. f6:11110110 SHR
  9. 85:10000101 GLO R5
  10. 3d:00111101 BN2 SETBIT ; branch if bit set (EF2 == 0)
  11. a 2e:00101110
  12. b fe:11111110 SHL ; bit not set
  13. c 30:00110000 BR SAVEBIT
  14. d 2f:00101111
  15. e 7e:01111110 SETBIT SHLC
  16. f 62:01100010 SAVEBIT OUT P2 ; CLK for SPI, INC Rx
  17. a5:10100101 PLO R5
  18. 86:10000110 GLO R6
  19. 3a:00111010 BNZ RDBITLOOP
  20. 26:00100110
  21. 85:10000101 GLO R5 ; get byte
  22. 57:01010111 STR R7 ; save byte
  23. 17:00010111 INC R7
  24. 28:00101000 DEC R8
  25. 88:10001000 GLO R8
  26. 3a:00111010 BNZ BLOCKLOOP
  27. a 21:00100001
  28. b e2:11100010 SEX R2 ; one page finished
  29. c 98:10011000 GHI R8
  30. d 52:01010010 STR R2
  31. e 64:01100100 OUT P4 ; show page count on LEDs
  32. f 22:00100010 DEC R2
  33. 3a:00111010 BNZ BLOCKLOOP-1
  34. 20:00100000
  35. 61:01100001 OUT P1 ; deactivate CS to stop operation
  36. e0:11100000 SEX R0
  37. c0:11000000 LBR 08000H ; start loaded program
  38. 80:10000000
  39. 00:00000000

  1. d0:11010000 SEP R0
  2. a5:10100101 WRITEBYTE PLO R5 ; save transmit byte
  3. f8:11111000 LDI 8 ; counter 8 bits
  4. a 08:00001000
  5. b a6:10100110 PLO R6
  6. c 85:10000101 WRBITLOOP GLO R5 ; get the next bit
  7. d fe:11111110 SHL ; next bit is in the carry
  8. e a5:10100101 PLO R5
  9. f c7:11000111 LSNF ; skip if bit is 0
  10. 62:01100010 OUT P2
  11. 01:00000001 BYTE 00000001B ; CLK for SPI with data bit cleared
  12. cf:11001111 LSDF ; skip if bit is 1
  13. 62:01100010 OUT P2
  14. 00:00000000 BYTE 00000000B ; CLK for SPI with data bit set
  15. 26:00100110 DEC R6
  16. 86:10000110 GLO R6
  17. 3a:00111010 BNZ WRBITLOOP
  18. 4c:01001100
  19. 30:00110000 BR WRITEBYTE-1
  20. a 47:01000111
 
Added:
>
>		 END
 

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