Difference: McForth (8 vs. 9)

Revision 92019-01-18 - PeterSchmid

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EEPROM Serial Communication

Serial Peripheral Interface SPI, MC is the SPI master, the host is the slave.

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e.g. AT25M02 SPI EEPROM 2Mbit (256 KiB, $3) or 25LC512 (64 KiB, $1.50). DIL8 Package. 256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system.
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e.g. AT25M02 SPI EEPROM 2Mbit (256 KiB, $3) or 25LC512 (64 KiB, $1.50). DIL8 Package. 256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system.
 
CLK   MC ->- host
MOSI  MC ->- host
Line: 163 to 163
 SS MC ->- host or other peripherals (optional)
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A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation.
 
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Invalid Opcode: If an invalid opcode is received, no data will be shifted into AT25M02 and the Serial Data Output (SO) pin will remain in a high impedance state until the falling edge of CS is detected again. This will reinitialize the serial communication.

25LC512 Instruction Set

Name Format Description
READ 0000 0011 Read data from memory array beginning at selected address
WRITE 0000 0010 Write data to memory array beginning at selected address
WREN 0000 0110 Set the write enable latch (enable write operations)
WRDI 0000 0100 Reset the write enable latch (disable write operations)
RDSR 0000 0101 Read STATUS register
WRSR 0000 0001 Write STATUS register
PE 0100 0010 Page Erase – erase one page in memory array
SE 1101 1000 Sector Erase – erase one sector in memory array
CE 1100 0111 Chip Erase – erase all sectors in memory array
RDID 1010 1011 Release from Deep power-down and read electronic signature
DPD 1011 1001 Deep Power-Dow

AT25M02 Instruction Set

Name Format Description
LPWP 0000 1000 Low Power Write Poll
WREN 0000 0110 Set Write Enable Latch (WEL)
WRDI 0000 0100 Reset Write Enable Latch (WEL)
RDSR 0000 0101 Read Status Register (SR)
WRSR 0000 0001 Write Status Register (SR)
PE 0100 0010 Page Erase – erase one page in memory array
SE 1101 1000 Sector Erase – erase one sector in memory array

RDSR 0000 0101 (05h) Read Status Register (SR) Status Register Section 4.2.1 LPWP 0000 1000 (08h) Low Power Write Poll Status Register Section 4.2.2 WREN 0000 0110 (06h) Set Write Enable Latch (WEL) Status Register Section 4.3.1 WRDI 0000 0100 (04h) Reset Write Enable Latch (WEL) Status Register Section 4.3.2 WRSR 0000 0001 (01h) Write Status Register (SR) Status Register Section 4.4 READ 0000 0011 (03h) Read from Memory Array Memory Array Section 5. WRITE 0000 0010 (02h) Write to Memory Array Memory Array Section 6

 

Serial EEPROM Connected to Centronics Connector (Switches and LEDs)

Sharing the LED and Switch port, you loose two LEDs and one switch. Conflict with the bootstrap loader, some sort of disable EEPROM needed e.g. switch or jumper.

Line: 172 to 237
 
MISO J2.9 IN7 SWITCH7 2 SO direct
MOSI J2.11 O7 LED7 5 SI direct
CLK J2.10 O6 LED6 6 SCK direct
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CS   1 CS Pullup 10 k, switch to GND
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CS ? O5 LED5 1 CS Pullup 10 k, switch to GND
 
  P4.3 VDD 8 VCC +5V
  " 3 WP +5V
  " 7 HOLD +5V
Line: 189 to 254
 
MISO /EF2 2 SO direct
MOSI D0 5 SI direct
CLK TPB & N1 (OUT2) 6 SCK wired AND; Pullup 10 k, 2 1N4148
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CS   1 /CS GND
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CS ? 1 /CS GND
 
    8 VCC +5V
    3 /WP +5V
    7 /HOLD +5V
 
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