Difference: Spyr1802 (1 vs. 2)

Revision 22017-11-15 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"

Emulate the CDP1802 with an ARM

Line: 8 to 8
 
  • 5 V-tolerant IOs or better 5 V supply
  • 48 MHz clock
  • 36 IOs
Changed:
<
<
  • 96 KiB Flash
    • 64 KiB Flash for emulating external ROM memory
    • 32 KiB emulating program
  • 16 KiB RAM
    • 8 KiB RAM for emulating external RAM memory
    • 8 KiB RAM emulating program
>
>
  • 96 KiB Flash
    • 64 KiB Flash for emulating external ROM memory
    • 32 KiB emulating program
  • 16 KiB RAM
    • 8 KiB RAM for emulating external RAM memory
    • 8 KiB RAM emulating program
 
  • LQFP48 package (7 x 7 mm) or QFN64, fit between DIL40

Candidates

  • STM most IOs are 5 V tolerant
Changed:
<
<
>
>
 
  • Cypress
Changed:
<
<
>
>
 
  • NXP
    • LPC line
    • Kinetis® E Series: 5V, Robust Microcontrollers (MCUs) based on Arm, unfortunately frown no packages smaller than 10 x 10 mm

Revision 12017-11-14 - PeterSchmid

Line: 1 to 1
Added:
>
>
META TOPICPARENT name="WebHome"

Emulate the CDP1802 with an ARM

ARM Evaluation

Features

  • 5 V-tolerant IOs or better 5 V supply
  • 48 MHz clock
  • 36 IOs
  • 96 KiB Flash
    • 64 KiB Flash for emulating external ROM memory
    • 32 KiB emulating program
  • 16 KiB RAM
    • 8 KiB RAM for emulating external RAM memory
    • 8 KiB RAM emulating program
  • LQFP48 package (7 x 7 mm) or QFN64, fit between DIL40

Candidates

-- Peter Schmid - 2017-11-14

Comments

<--/commentPlugin-->
 
This site is powered by the TWiki collaboration platform Powered by PerlCopyright © 2008-2024 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki? Send feedback