Main MCU Firmware

Tools

Kinetis Design Studio Integrated Development Environment (IDE)

The Kinetis Design Studio (KDS) is a complimentary integrated development environment for Kinetis MCUs that enables robust editing, compiling and debugging of your designs. Based on free, open-source software including Eclipse, GNU Compiler Collection (GCC), GNU Debugger (GDB), and others, the Kinetis Design Studio IDE offers designers a simple development tool with no code-size limitations.

You have to use an old Version (2.0.0, current is 3.2.0) for the veloblingbling project because the Processor Expert USB Stack does not work with newer Kinetis Design Studio Integrated Development Environment.

Processor Expert Software and Embedded Components

Processor Expert Software is a development system to create, configure, optimize, migrate, and deliver software components that generate source code for our (Freescale/NXP) silicon.

Unfortunately the Processor Expert USB Stack v3.2.0 is no longer supported. But you can still find it under:
(ARCHIVED) USB Stack

I will migrate the Velo Bling-Bling USB software from Freescale USB Stack v3.2.0 to Erich Styger's USB Stack.

Debug Adapter

The KDS supports following adapters (protocols):

  • OpenSDA Serial and Debug Adapter (proprietary Freescale/NXP/P&E Microcomputer Systems)
  • Segger (industrial standard)
  • OpenOCD,

I propose to use a Freescale/NXP Freedom Board e.g. FRDM-K22F as a debug adapter. I use the OpenOCD/CMSIS-DAP/mbed-interface protocol (factory set on FRDM-K22F).

Quote from Freedom Board for Kinetis K22F Hardware (FRDM-K22F), Users Guide

3.2.1 Debug interface

Signals with SPI and GPIO capability are used to connect directly to the SWD of the K22F. These signals are also brought out to a standard 10-pin (0.05”) Cortex debug connector (J11). It is possible to isolate the K22F MCU from the OpenSDAv2 circuit and use J11 to connect to an off-board MCU. To accomplish this, cut the trace on the bottom side of the PCB that connects J7 pin 2 to J11 pin 4. This will disconnect the SWD_CLK pin to the K22F so that it will not interfere with communication to an off-board MCU connected to J7. The J11 header is populated by default. A mating cable, such as a Samtec FFSD IDC cable, can then be used to connect from the OpenSDAv2 of the FRDM-K22F to an off-board SWD connector.

You can still use the FRDM-K22F as a prototype board. You should solder a pinheader and plug a jumper if you want to use the FRDM-K22F as a prototype board.

See also an excellent introduction to OpenOCD/CMSIS-DAP Debugging by Erich Styger.

Get the Software and Import it into the IDE

Get the Source from the Repository

The Velo Bling-Bling Kinetis project is on the GitHub repository https://github.com/spyren/veloblingbling-mcu. Download the ZIP-File and unzip it or better clone the repository e.g. for GNU/Linux:
psi@homer:~/veloblingbling> git clone https://github.com/spyren/veloblingbling-mcu
Klone nach 'veloblingbling-mcu' ...
remote: Counting objects: 265, done.
remote: Compressing objects: 100% (97/97), done.
remote: Total 265 (delta 167), reused 260 (delta 166), pack-reused 0
Empfange Objekte: 100% (265/265), 223.50 KiB | 0 bytes/s, Fertig.
Löse Unterschiede auf: 100% (167/167), Fertig.
Prüfe Konnektivität ... Fertig.
psi@homer:~/veloblingbling>

Import the Project into the IDE

File -> Import -> General -> Existing Projects into Workspace ->

MCU MK22DX256VLF5

  • Data sheets
  • Features
    • Core ARM Cortex M4, 50 MHz
    • Run mode current 17 mA, wait 8 mA
    • A/D Converter - Bits (bit) 16
    • Additional Features Vref
    • Ambient Operating Temperature (Min-Max) (°C) -40 to 105
    • Analog Comparator 2
    • Cache (kB) 0
    • Debug Features JTAG, Serial Wire Debug, cJTAG
    • EEPROM (kB) 4
    • External Bus Interface n/a
    • FlexMemory (KB) 64
    • I/O Pins 29
    • Independent ADC modules 1
    • Internal Flash (kB) 256
    • Internal RAM (kB) 32
    • Max Simultaneous ADC channels 1 DP14 SE
    • Pulse Width Modulators - Channels 10
    • Sample Exception Availability Y
    • Serial Interface - Number of Interfaces 4
    • Serial Interface - Type UART, SPI, I2C, I2S
    • USB OTG LS/FS
    • Supply Voltage (Min-Max) (V) 1.71 to 3.6
    • Timer type Low Power Timer, Periodic Interrupt Timer, Programmable Delay Block
    • Total DMA Channels 16
    • Total Flash memory (kB) 320
    • LQFP-48

The MK20DX128VLF5 can also be used, but the memory footprint (Flash and RAM) has to be reduced. The MKL27Z256VFT4 would be an excellent alternative (build-in bootloader, 8 mA run mode current with peripherals, 4 mA wait mode current), but the case is QFN48 and therefore the PCB layout have to be changed.

-- Peter Schmid - 2016-03-30

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Topic revision: r6 - 2016-04-23 - PeterSchmid
 
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