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2.4 Control Register

The ADS Control Register is 16 bit wide and has the following layout (the multiplexer enable line is not used yet):


Table 5: ADS Control Register
Bit Position Hex Mask Description
0 0001 multiplexer address line 0
1 0002 multiplexer address line 1
2 0004 multiplexer address line 2
3 0008 start ADC output
4 0010 Activator 1 control line
5 0020 Activator 2 control line
6 0040 Activator enable line
7 0080 Valve 1 control line
8 0100 Valve 2 control line
9 0200 Valve enable line
10 0400 multiplexer enable line
11 0800 not used
12 1000 CDMS SR bit
13 2000 CDMS ME bit
14 4000 CDMS BSY bit
15 8000 watchdog enable line


The Watchdog Enable Line read-out is inverse.


next up previous contents
Next: 2.5 Schematics Up: 2 Hardware Description (Electronics) Previous: 2.3 Interrupts   Contents
Peter Schmid 2001-05-18